QFN package (quad flat no leads) - QFN is the name specified by Japan Electronic Machinery Industry Association (JEDEC).
Four side pinless flat package, one of the surface mount packages, is a new surface mount chip packaging technology with pad at the bottom, small size, small volume and plastic as sealing material. Because QFN package does not have gull wing lead like traditional SOIC package, and the conductive path between internal pin and pad is short, self inductance? S number and package body? How long does it last? Therefore, it can provide excellent electrical performance, and because there is no gull wing lead, it can reduce the so-called antenna effect and reduce the overall electromagnetic interference (EMC / EMI). In addition, it also provides excellent heat dissipation through the exposed lead frame pad, which has a direct heat dissipation channel to release the heat of the chip in the package. Usually, the heat dissipation pad is directly welded on the circuit board, and the heat dissipation via in the PCB helps to diffuse the power consumption of the multi harrier into the copper grounding plate, so as to absorb the heat of the multi harrier; It can also achieve better land sharing effect. At present, QFN package has been widely used in general mobile phones and laptops, but it is about to flourish in LED display.
Comparison of heat dissipation, size and volume between QFN and SOPGenerally, the size of SOP used is 104 mm2 (8x13x1.9mm), while the relative size of QFN is only 16mm2 (4x4x0.9mm), which is only 6 7 times the size of SOP; It has greater flexibility in the design of some small spacing display screens.Thermal resistance Ja) the coefficient is SOP = 59 / W, QFN = 39 / W, that is, the temperature from the chip node to the surface at the power of one watt. The following is the calculation formula of thermal resistance commonly used in the industry:
TJ= ja*PDTaTJ= jc*PDTc Ja= jc* ca
Symbols and units used in the formula TJ C: node (chip) temperature Tc C: actual temperature Ta C: ambient temperature PD W: power supply voltage JA ( C / W): heat transfer impedance from actual to external surface JC ( C / W): heat transfer impedance from node to actual Ca ( C / W): heat transfer impedance from actual to external surfaceIn other words, if the same return temperature and power consumption, the node temperature on the chip will be different due to different packages. For example: if the ambient temperature is 85 C and the power consumption of the chip is 0.5W, the temperatures of SOP and QFN are as follows:Design of lamp drive in one
Due to the two characteristics of small volume and good heat dissipation of QFN, in the past, the specifications below pitch 16mm of outdoor display screen will choose the design of lamp drive separation because of the limitation of PCB board size routing and heat dissipation; That is, the LED light board and the driver chip board are placed on two to three different PCB boards respectively, and then connected with each other through connectors and cables. Although this design can solve the heat dissipation problem, the inductive effect generated through the connectors and wires may greatly reduce the color resolution of the display screen, and the inductive effect will also increase the chance of electromagnetic interference. When using QFN design; Because of its small size and no heat dissipation problem, the chip can be placed in the gap of the LED lamp. Therefore, it does not need to use more PCB boards and transmission lines. It is simpler in design and its cost can be reduced. Similarly, if the QFN design is used for the indoor display screen, the heat dissipation problem can also be greatly improved.