Whether driven by Moore's law or consumer demand, the required level of performance in today's TV may seem overwhelming. Compared with the standard definition television format (SDTV), the amount of data driven by the digital television with 1080 pixel high definition (hd) format is 6 times larger. It needs to manage digital television, IPTV, video conference broadcasting and process Dolby AC-3, MPEG and other audio formats. These functions have become the necessary functions of digital television (DTV).In terms of the highest requirements for audio, video and input signal formats, there are several viewing options: forward projection, rear projection, DLP, LCD, plasma and CRT. Whether watching TV on the 1-inch display embedded in the watch or watching TV on the whole wall with the display screen of the projection system, the requirements for the combination of size and performance are almost endless.Fundamentals of digital television
Even though every TV on the shelf may be very different in size, appearance, shape factor and the basic description given to you by the salesperson, the basic construction modules of TV are very similar when you examine its interior.Generally speaking, digital TV can be divided into less than 10 main modules: display (and driver), core media engine, audio codec and processing, video codec and processing, tuner, interface module and power supply. The absolute performance requirements for each module are defined by the performance level of the comfort experience of your favorite seat.The following figure is a block diagram of a typical digital TV system.
Figure 1: block diagram of typical digital TV system
In Figure 1, we give the basic block diagram of HDTV, which we have considered at the functional block diagram level. Developing the TV system behind the screen requires many tools, which can be obtained from various enterprises. However, in the process of integrating solutions from different component suppliers, it is necessary to speed up the design cycle to shorten the time to market and ensure compatibility. Whether using DLP technology, DSP based digital media processor, other core processing solutions or some other high-performance analog components, it is necessary to design a highly integrated, flexible and easy-to-use digital TV for the rapidly evolving digital TV market. For converged applications, it is very important to design high-performance audio and video codec, graphics acceleration, communication and support functions into the home entertainment experience system.
Consumers often put forward very high requirements for video experience when watching TV. Because of this, resolution, brightness, contrast and clarity are important to the "realistic" experience. It is very important for TV to support a variety of ATSC TDV formats, NTSC and PAL decoding, composite and S-Video input and two-dimensional filtering. With the development of HDTV, supporting full HD with 1080i resolution equipped with 3D filtering will be the standard configuration. In the process of receiving the video signal chain shown in Figure 1, it is important to select a video decoder, analog-to-digital converter (ADC) and video buffer with the ability to mix various performances, so that you can adjust the performance according to the cost target of the system.
Figure 2 Data stream path of video decoder
Figure 2 shows the data stream path of the video decoder, which is responsible for processing NTSC, pal, SECAM, S-Video, SCART, YPbPr, RGB, 480p and other input formats. In digital TV, support for this level of flexibility is necessary, just to make a model work in any format after actual setting. Typical performance characteristics of digital TV decoder include synchronization, blanking, field, active video window, horizontal and vertical synchronization, clock, synchronous phase locking (for downlink video coding synchronization), main CPU interrupt and programmable logic I / O signal. This is a supplement to digital video output and for advanced vertical blanking period (VBI) data recovery. As an additional function, some video decoders support VBI data processor (VDP) for data slicing, parsing and error checking on text television broadcasting, transmission subtitles (CC) and other VBI data. The built-in FIFO stores up to 11 lines of text TV broadcast data, and appropriate main interface synchronization and full screen text TV broadcast recovery are several common requirements in today's system. However, some implementations require a decoder that can provide output formatted data at twice the speed of the sampled original brightness data for VBI processing based on the main CPU.
For the ADC in the signal chain, PC and HD video output require improved jitter reduction performance, high image quality in the video system, and can support the increasing bandwidth demand. In the digital TV implementation scheme, an 8 / 10 bit three ADC usually provides a sampling rate of 165 MSPs, which provides rich video performance, and is also an ideal choice for commercial projectors, TVs and set-top boxes.Finally, the output resolution of the video signal chain should be matched with the performance of the display and the resolution of the input signal, so as to optimize the video design. In the era of low resolution CRT TV, it may always be acceptable to adopt a lower performance front end. However, with today's high-resolution display, any noise or irregular signal in the analog front end will be clearly displayed on the screen of digital TV.