Design of Characters Displayed on LED Electronic Display Screen
Using the field programmable logic device (FPGA) as the controller, selecting the appropriate device, using the rich I / O port, internal logic and wiring resources of the device, and adopting the top-down modular design method, the whole display system can be designed conveniently.
Electronic design automation (EDA) technology is a digital electronic system design based on programmable device (PLD). It is a new design method for system chip integration. It is also rapidly replacing the traditional design method based on PCB. With the support of EDA tool software MAX plus , this design has passed the compilation, adaptation and software simulation verification. Finally, the hardware experiment loaded into the real experimental system proves its correctness.
1 system structure and principle
Combined with the EDA experimental box produced by Shanghai hanghong high tech company, the 16 character font to be displayed has been stored in 8000h 807fh of EPROM, and a single 8 8LED dot matrix (wtd3088) displays characters, and the display control is realized by field programmable gate array (FPGA) epf10k20tc144-4. The system principle is that FPGA first generates the dot matrix font address, reads out the data from the memory, stores it in the 16 bit register, and then outputs it to the column of the LED dot matrix. At the same time, the dot array is scanned circularly to dynamically display the data. When the column that needs to display the data font can be coordinated with the selected column, the characters can be displayed correctly.
2 FPGA design and principle
For at 8 To display characters on the 8LED dot matrix, first express the characters as 8 8 pixel points (AD0 Ad7) are character pixel information extracted and arranged in sequence by column, all of which have 8-bit word length. Then, the pixel information is extracted from the multi characters in turn and stored in EPROM in order to get a data sequence to be displayed. Further, by controlling the release process of the data sequence through the addressing method, it can be realized in 8 The purpose of scrolling multiple character information on 8LED LED dot matrix. Page controls the scrolling speed of character display, and its value range shall be 0 n. col determines the scanning speed of column switch of LED dot matrix, and its value range shall be 0 7. The address pointer that can locate the data to be displayed in the display data sequence at a certain time can be calculated by the following formula: addr = page Col. it should be noted that the scanning speed shall be much greater than the scrolling speed, The scanning clock used in this design is 1kHz, and the rolling speed of characters is 1s / piece. Adjust the scrolling speed of character information; Changing the repeated scanning cycle of col can improve the stability of displaying complete character information on LED dot matrix.
In addition, it should be pointed out that since the operation of addr depends on hardware, the modulus of address pointer addr should be n, and in order to roll all character information through the LED dot matrix, 8 empty data bytes must be added before data n. According to its working principle, a VHDL language program describing the hardware function of FPGA core is designed. This design combines EDA experimental box and MAX PLUS II R & D tool of Altera company, and adopts the way of behavior description.
The VHDL program is as follows:
libraryieee;
use ieee.s td_ logic_ 1164.all;
use ieee.s td_ logic_ arith.all;
use ieee.s td_ logic_ uns igned.all;
entityledis
memcs,rd,wr,cs0809,sELmled:out s td_logic;
end;
architecture led_ archofledis
s ignalcol:integerrange 0to7;
s ignalpage :integerrange 0to15;
s ignaloe:s td_ logic;
begin
begin
ifreset=''1'' then
colcolendif;
endproces s;
begin
pageendif;
endproces s;
admemcs wrendled_ arch;
3 experimental verification
By using the emulator in the EDA tool software MAX plus , the VHDL design of the compiled character rolling display is simulated and verified, which proves that the core hardware of FPGA works well. In addition, after downloading the VHDL program to the EDA experimental box produced by Shanghai hanghong high tech company, the characters stored in EPROM can be displayed correctly. It shows that the character scrolling and display scanning in the hardware system are also normal, which verifies the correctness of the design.
4 Conclusion
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